Download NXP P89V51RD2 Datasheet 8-bit 64 kB Flash Microcontroller

Datasheet 89V51RD2 possess all vital information about the 89V52RD2 NXP microcontrollers, which plays a crucial role in the field of development. Microcontroller based on 80C51 based instruction set and architecture which includes 64 kb flash memory and RAM random access memory of 1024 bytes. Mode x2 option plays an important role in the development, this is the key features P89V51RD2 microcontroller. The beauty of the X2 Mode is a application and hardware designer has the

option to select a conventional clock speed of 80C51 core microcontroller or to choose X2 mode means 6 clocks per machine cycle. The benefit is to reduce the clock speed without compromising the performance of microcontroller. Download data sheet 89V51RD2 and read carefully. Another key feature of the microcontroller for designer to program the microcontroller either of the ways. Means embedded engineer can program the flash memory using both methods Parallel Programming or In System Programming (ISP). Both of the methods are used in development. Parallel programming mode supports a method called gang programming at very high speed, thus it helps us to reduce the time of development and cost. In System Programming ISP allows and helps us to develop the application without removing the hardware, means we need not pull out hardware from the testing board, when testing is completed then install the microcontroller in the main board. This capability enable the developer to update the firmware automatically. P89V51RD2 also supports In Application Programmable (IAP) which allows us to program flash memory to configure the application in the running mode.


Key Features 89V51RD2/89V52RD2

  • 80C51 based CPU (Central Processing Unit)
  • Sports with 64 KB on Chip flash memory.
  • Three timers and Counters with 16 bit supports.
  • In system Programming Features (ISP).
  • DPTR Register Second.
  • Optional Clock speed X2 Mode 12 Clock or 6 Clock Machine Cycle.
  • Advanced UART features using serial peripheral interface(SPI) .
  • PWM function with Programmable Counter Array (PCA) with capture or compare key functions.
  • Four input output ports supports 8 bit data transmissions with high current 16ma each, Port 1.
  • A Programmable Watchdog timer (WDT)
  • With Eight interrupt sources including four priority levels.
  • In Application Programming, allows IAP for ease in development. Low EMI mode (ALE inhibit)
  • Low Power consumption using 5 Volts operational voltage up to 40 MHZ.

ATMEL Series Microcontrollers

Atmel Device name Flash Memory Memory Size
AT89C1051 1K Flash 64 bytes RAM
AT89C2051 2K Flash 128 bytes RAM
AT89C4051 4K Flash 128 bytes RAM
AT89C51/S51 4K Flash 128 bytes RAM
AT89C52/S52 8K Flash 256 bytes RAM
AT89C55 20K Flash 256 bytes RAM
AT89S8252 8K Flash 256 bytes RAM
AT89S53 12K Flash 256 bytes RAM


Download Datasheet NXP Series Microcontrollers

P89V51RB2FA PLCC44, P89V51RB2FN DIP40, P89V51RB2BBC TQFP44, P89V51RC2FA PLCC44, P89V51RC2FBC TQFP44, P89V51RC2FN DIP40, P89V51RD2FA PLCC44, P89V51RD2FBC TQFP44, P89V51RD2BN DIP40 ,P89V51RD2FN DIP40.

Ports

Port 0 : it is an 8 bit  bi direction input output port. It has low order address and data multiplexing features. it has strong pull us using transitioning methods.

Port 1: Port 1 is also an 8 bit bidirectional port equipped with internal pull ups the best features. The internal pull ups becomes 1 when data is written to it and supports input in this state.

Port 2 : Port2 is also 8 bit bi-directional port with input and output features, it also includes internal pull ups. All pins becomes HIGH by internal pull ups when pins has state 1.

Port 3: Port 3 pins are activated as pulled HIGH when Internal pull ups are high, when one is written.

RXD : Port used to receive data, Serial Input Ports,
TXD: Port used to transfer data, Serial Output Ports
INT0: interrupt 0 input
INT1: interrupt 1 input
T0:  input to Timer or Counter
T1:  input to Timer or Counter
WR:  write strobe for external data memory
RD:  read  strobe for external data memory.

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